The present invention generally relates to a packaged semiconductor device, and more specifically to a packaged semiconductor device in which a terminal arrangement of external leads can be freely changed and in which electrode pads of a chip are readily electrically connected to the external leads.
In a conventional packaged semiconductor device (referred to as a "device" hereinafter), generally only one terminal arrangement has been determined at a designing process and, an electrode pad of a chip is directly and electrically connected to a preselected lead by employing a conducting or conductive wire in accordance with this terminal arrangement. These components are then encapsulated by, for example, a resin, ceramics or a can. To modify the terminal arrangement, there is no means other than changing the design of the electrode pad arrangement of the chip. Thus, in principle, such a terminal arrangement modification is not a practical solution. Furthermore, in general, the electrode pads employed in the chip are regularly arranged at the outer peripheral portion of the chip, taking account of the terminal arrangement and position for the leads.
In the publication of JP-A-57-141933 (laid-open on Sep. 2, 1982), there is disclosed that both the electrode pads and external leads which have been regularly arranged at the outer peripheral portion of the chip are connected to the external leads by way of a conductive layer having a predetermined shape and formed on the insulating film.
According to the conventional prior art, there is little degree of freedom in arranging terminals of devices to users. Thus, in manufacturing printed boards after selections have been made of devices and other circuit parts employed in respective portions of a package, circuit patterns will have to be designed in accordance with the terminal arrangements of them.
However, there are some cases that the circuit patterns must be formed along ineffective paths. As a result, the resultant circuit patterns become complex and, at the same time, the dimension of the circuit board becomes bulky, which may impede optimum designing of circuit boards.
Also, in accordance with the conventional techniques, there is no way other than a design modification of a chip per se to modify a terminal arrangement of a device. If this principle designing policy is neglected, and if attempts are made to modify connection combinations between the electrode pads of the device and the leads thereof, there are some risks that connecting wires may cross with each other or become very long, thereby causing short circuits, or other problems.
Furthermore, in accordance with the conventional prior art, the electrode pads employed in the chip must be arranged in a regular form, taking account of the terminal arrangement and positions of the leads at the peripheral portions of the chip. As a consequence, wiring pattern is necessarily provided within the circuit of the chip.
Meanwhile, packages are described in NIKKEI ELECTRONICS, Mar. 1, 1982, pp. 120-124, the packages having a structure in which TAB and flip chip technologies are utilized in combination.